1. Field of the Invention
The invention relates to a comparing circuit for use in a receiving apparatus of a radio communication system for mobile communication or the like, and also relates to a demodulator circuit using the comparing circuit.
2. Description of Related Art
In the case of an FSK (Frequency Shift Keying) signal which is often used in a radio communication system for example, an offset occurs in a DC potential of a demodulation signal due to an influence of a difference between a frequency of the FSK signal and a predetermined carrier frequency. A demodulator circuit which needs to trace the DC offset potential, therefore, has been proposed in, for example, in Japanese Patent Kokai No. 6-37822 or the like.
FIG. 1 is a constructional diagram of a conventional demodulator circuit disclosed in this document.
In the demodulator circuit, a demodulation signal obtained by detecting a reception signal by a detector 1 is branched by a branch part 2 in order to trace the DC offset. One of the branched demodulation signals is smoothed by a smoothing part 3 comprising a capacitor. A DC offset voltage is detected by a reference voltage generating part 4 comprising a voltage dividing resistor, and a reference potential is generated and sent to a voltage comparing part 5. The voltage comparing part 5 compares the reference potential sent from the reference voltage generating part 4 with the other demodulation signal branched by the branch part 2 and generates an output signal at a logic level (xe2x80x9cHxe2x80x9d or xe2x80x9cLxe2x80x9d level) according to a comparison result.
In a transmitting and receiving apparatus in a certain kind of radio communication system, a transmission signal and a reception signal are divided by a time sharing fashion. Further, besides a case where a transmitting mode and a receiving mode are switched consecutively, there is a case where a pause mode (that is, a mode in which although a power voltage has been applied, it is neither the transmitting mode nor the receiving mode) exists in a switching period. The reception signal, therefore, reaches the receiving apparatus like a burst signal at a time when the transmitting and receiving apparatus is switched to the receiving mode, and a DC potential of the demodulation signal at this time becomes dynamic. To demodulate the signal without causing a data error, it is necessary to trace the dynamic offset potential.
In the conventional demodulator circuit of FIG. 1, however, the reference potential which is supplied to the voltage comparing part 5 is generated by the reference voltage generating part 4 on the basis of the resistance voltage division between a power voltage Vcc and the ground. Therefore a problem existed such that a DC path (that is, a DC current flowing between the power voltage Vcc and the ground) exists even when the transmitting and receiving apparatus is in the transmitting mode or pause mode and a current consumption is caused. Furthermore, if it is intended to suppress an electric power consumption in the transmitting mode, it is necessary to turn off (shut off) the whole power source of the demodulator circuit. Since an enough time is needed to settle the output of the reference voltage generating part 4 just after the shift to the receiving mode, there is a problem of the delay of a timing to trace a fluctuation of the incoming dynamic offset.
It is an object of the invention to solve the problems of the conventional arrangements and to provide a comparing circuit which can promptly trace a DC offset when an operating mode is shifted to a receiving mode while suppressing an electric power consumption and a demodulator circuit using the comparing circuit.
To solve these problems, according to the first aspect of the invention, there is provided a comparing circuit which traces a DC offset potential, comprising: a reference voltage generating part having voltage generating means to which an AC signal whose DC potential fluctuates is supplied and which detects the DC offset potential on the basis of the AC signal and generates a reference potential and first control means for shutting off a power current flowing in the voltage generating means and controlling the voltage generating means to a power down state; and a voltage comparing part having comparing means to which the AC signal and the reference potential are supplied and which compares a voltage level of the AC signal with a voltage level of the reference potential and generates an output signal at a logic level according to a result of the comparison and second control means for shutting off a power current flowing in the comparing means and controlling the comparing means to the power down state. In the receiving mode, the reference voltage generating part and the voltage comparing part are made operative. In the transmitting mode, the reference voltage generating part is made operative and the voltage comparing part is set to the power down state by the second control means. In the pause mode, the reference voltage generating part and the voltage comparing part are set to the power down state by the first and second control means.
By using the above construction, in the receiving mode, the reference voltage generating part and the voltage comparing part are made operative, the reference potential is generated by the reference voltage generating part, and the reference potential is compared with the AC signal by the voltage comparing part. In the transmitting mode, the voltage comparing part is set to the power down state by the second control signal and only the reference voltage generating part is made operative. When the operating mode is shifted from the transmitting mode to the receiving mode, it is thus possible to promptly trace the DC offset. In the pause mode, the reference voltage generating part and the voltage comparing part are set to the power down state by the first and second control means and the electric power consumption is suppressed.
According to the second aspect of the invention, there is provided a comparing circuit which traces a DC offset potential, comprising: a reference voltage generating part having voltage generating means to which an AC signal whose DC potential fluctuates is supplied and which smoothes the AC signal by a voltage dividing resistor and a capacitor, detects the DC offset potential, and generates a reference potential and switching means for shutting off a power current flowing in the voltage dividing resistor and controlling the voltage generating means to a power down state; and a voltage comparing part having comparing means to which the AC signal and the reference potential are supplied and which compares a voltage level of the AC signal with a voltage level of the reference potential and generates an output signal at a logic level according to a result of the comparison and control means for shutting off a power current flowing in the comparing means and controlling the comparing means to the power down state. In the receiving mode, the reference voltage generating part and the voltage comparing part are made operative. In the transmitting mode, the reference voltage generating part is made operative and the voltage comparing part is set to the power down state by the control means. In the pause mode, the reference voltage generating part and the voltage comparing part are set to the power down state by the switching means and the control means.
By using the above construction, in the receiving mode, the reference voltage generating part and the voltage comparing part are made operative, the reference potential is generated by the reference voltage generating part, the reference potential is compared with the AC signal by the voltage comparing part, and an output signal according to a result of the comparison is generated. In the transmitting mode, the voltage comparing part is set to the power down state by the control means and only the reference voltage generating part is made operative. When the operating mode is shifted from the transmitting mode to the receiving mode, therefore, it is possible to promptly trace the DC offset. In the pause mode, the reference voltage generating part and the voltage comparing part are set to the power down state by the switching means and the control means and the electric power consumption is suppressed.
According to the third aspect of the invention, there is provided a demodulator circuit which traces a DC offset potential, comprising: a detecting circuit having detecting means for detecting a reception signal and generating an AC signal whose DC potential fluctuates and third control means for shutting off a power current flowing in the detecting means and controlling the detecting means to the power down state; and a comparing circuit according to the first aspect of the invention. In the receiving mode, the detecting circuit and the comparing circuit are made operative. In the transmitting mode, the reference voltage generating part is made operative, and the voltage comparing part and the detecting circuit are set to the power down state by the second and third control means. In the pause mode, the comparing circuit and the detecting circuit are set to the power down state by the first, second, and third control means.
By using the above construction, in the receiving mode, the detecting circuit and the comparing circuit are made operative. The reception signal is detected by the detecting circuit and the AC signal (that is, the demodulation signal) is compared by the comparing circuit. In the transmitting mode, only the reference voltage generating part is made operative, and the voltage comparing part and the detecting circuit are set to the power down state by the second and third control means. When the operating mode is, thus, ink shifted from the transmitting mode to the receiving mode, it is possible to promptly trace the DC offset. In the pause mode, the comparing circuit and the detecting circuit are set to the power down state by the first, second, and third control means. The electric power consumption is, thus, suppressed.
According to the fourth aspect of the invention, there is provided a demodulator circuit which needs to trace a DC offset potential, comprising: a detecting circuit having detecting means for detecting a reception signal and generating an AC signal whose DC potential fluctuates and power down control means for shutting off a power current flowing in the detecting means and controlling the detecting means to the power down state; and a comparing circuit according to the second aspect of the invention. In the receiving mode, the detecting circuit and the comparing circuit are made operative. In the transmitting mode, the reference voltage generating part is made operative and the voltage comparing part and the detecting circuit are set to the power down state by the control means and the power down control means. In the pause mode, the comparing circuit and the detecting circuit are set to the power down state by the switching means, the control means, and the power down control means.
By using the above construction, the operation almost similar to that of the demodulator circuit according to the third aspect of the invention is performed.